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aalbashar2
Joined: 29 Mar 2011
Posts: 4
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 Posted: Tue Mar 29, 2011 6:59 am Post subject: Sampling time error |
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Hello!
I got the following error each time I try to compile my design in simulink:
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Begin generation
Checking model status
Checking simulation times
Performing compilation and generation
*** ERROR ***
Errors occurred during netlist generation.
The periodic sample time 1 is not allowed because the ratio of this sample time over base rate (1.264197530864198e-015) is greater than the maximum value of uint32.
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I have checked the system many times for any block that may have a sample rate of 1, but I found non. Additionally, when I view the sample time legend , Matlab displays like 24 orange sampling time, but there is no orange block or lines in the whole design!
I was developing my own signal processing part using xilinx blocks in Simulink using a sample rate of 1 but when I combined it with the default example I started to get that error. therefore I built the same logic again directly in the default example without copying any block but it leads to the same results!
I have tried also to compile the examples that comes with X5-TX without any modifications, but it gives the same error.
I'm using Matlab 2009b and ISE 12.2
One more thing, I was able to compile the Default example but then it has started to give me the same error again and again!
Any hint on how I can solve this problem! |
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amane
Joined: 17 Apr 2006
Posts: 118
Location: Simi Valley
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| Posted: Tue Mar 29, 2011 9:52 am Post subject: |
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Hi,
Can you upload the design example mdl file?
Sincerely,
Amit Mane |
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aalbashar2
Joined: 29 Mar 2011
Posts: 4
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| Posted: Tue Mar 29, 2011 12:41 pm Post subject: |
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| Attached is the mdl file |
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amane
Joined: 17 Apr 2006
Posts: 118
Location: Simi Valley
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| Posted: Tue Mar 29, 2011 4:37 pm Post subject: |
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hi,
Please see the attached mdl file.
Let me know if this file compiles or not.
Sincerely,
Amit Mane
Innovative Integration Inc
Simi Valley ,Ca |
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amane
Joined: 17 Apr 2006
Posts: 118
Location: Simi Valley
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| Posted: Tue Mar 29, 2011 4:39 pm Post subject: |
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hi,
Please see the attached mdl file.
Let me know if this file compiles or not.
Sincerely,
Amit Mane
Innovative Integration Inc
Simi Valley ,Ca |
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aalbashar2
Joined: 29 Mar 2011
Posts: 4
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| Posted: Wed Mar 30, 2011 2:06 am Post subject: |
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Yeah, it compiles!
Thanx!
May I know what was the problem and how you fix it! |
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aalbashar2
Joined: 29 Mar 2011
Posts: 4
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| Posted: Wed Mar 30, 2011 3:48 am Post subject: |
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Dear Amit,
Unfortunately, I got the same error again.
I have made some slight modifications and compiled the model again, it works, but when I added a new output gateway, I got the exact same error!
I tried to compile the original model that you have sent me but again with the same error! |
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