Connecting Clocks internal to PC

[John Owen (EnTegra Ltd)]

I would like to put 1 X3-Timing and between 2 & 4 X3-10M's in the same PC, and run a simple ribbon between the 80172 adapters internal MDR connector to distribute clock and trigger from the X3-Timing. Is this possible? The samplerate is 10MSPS max.

The X3-Timing has DSTAR A, B and C outputs. The DSTAR A output is to pins 9A and 9B of P16. A 80172 adapter routes these to MDR pins 29 & 63. If a simple ribbon was made with multiple 68 way MDR's and fitted between the X3 boards, the X3-10M would get DSTAR A +/- on P16 9A and 9B. This is routed to the PLL external clock input and the manual says this must be LVDS.

The X3-Timing drives the DSTAR A from a CDCE18005 which has programmable output levels but Malibu sets STARA to LVPECL and does not make the CDCE18005::SetOutputConfig public, so it is fixed at LVPECL.

The CDCE18005 datasheet says its LVPECL mode output is VOH=2.4V and VOL 1.1V. This would drive the LVDS load within the common mode limit of 2.4V but slightly exceed the 1Vppk limit. However there would be 2 to 4 loads.

Would this work and be safe?

The PXI trigger outputs from X3-Timing are LVTTL and will be mapped across to DIO 0-7 on the X3-10M's, so a simple logic change will make use of these triggers.

[jhenderson]

John -

Why not mount the X3-10M modules on the 80172 adapter, then cable from the -5 configuration of the X3-Timing module to the clock and trigger inputs on each adapter? I realize that the cables must exit and re-enter the chassis, but that's still preferable to a ribbon hack...

[John Owen (EnTegra Ltd)]

We wanted to avoid the external cables purely for appearance. Its possible that 10 or more systems may be made a year for a seismology application. We haven't checked if the 68 way MDR is available for an inline ribbon use, if it isn't then your suggestion sounds better.

[jhenderson]

Issue closed