What happens to sampled data if the frequency is too high for the application to handle it? Will is start losing samples? If so, is there a mechanism for detecting overflow conditions?
How big is the FIFO? Internal memory? I need to understand how much elasticity is there before data begins to be lost.
There are two levels of system-level buffering in the system ahead of the application - onboard FIFO and driver-managed bus master memory. There is 64 MB of onboard FIFO, shared between available channels. On the UWB, for instance, this is equivalent to 16 MSamples per channel. The driver bus-master memory is 32 MB by default (8 MS/channel), but this may be may be increased through use of the supplied ReserveMemDsp applet up to 2 GB.
Room permitting, data is inserted into the onboard FIFO on each sample clock. As soon as a packet of samples is collected, it is bus-mastered to the host. If the rate of bus-mastering at your sample rate exceeds the rate at which the FIFO fills on your platform , the bus master memory will effectively extend the onboard FIFO resulting in much greater instantaneous load-carrying capacity. However, If the FIFO is full when the sample clock fires, it is overrun and presently there is no indicator of this event. The data set will contain a discontinuity.