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Avoiding metastability

 
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jhenderson
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Joined: 07 Mar 2006
Posts: 2267
Location: So. Cal. USA

PostPosted: Tue Jul 03, 2007 2:19 pm    Post subject: Avoiding metastability Reply with quote

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What is the alignment between the sample clock and the trigger on the PMC and XMC modules such that we do not get a meta-stable event?


The way we handle the trigger potential metastable condition, is by adding a double (or triple) register circuit at its input, clocking on the sample clock. This way, there's no strong requirement on the external trigger timing circuitry on the customer's hardware.

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