We plan to use the UWB PMC/XMC A/D card to a 6U VME/VXS Carrier Board directly, the Carrier Board only supply a power, we will not use PCI bus, and we will give up all PCI bus controlling operation mode. Can we configure the UWB A/D Clock/mode registers for fitting UWB PMC usual A/D sample (210MSPS) requirement?
Using the standard logic, configuration and control of the UWB is done via memory-mapped registers on the PCI bus. Without a PCI bus, we'd need to modify the standard logic to either hard-code the configuration, or allow configuration by some other means. This is readily achievable, but non-standard.
Can you supply us a configuration plan for two UWB PMC A/D card ( two dual 210MSPS A/D PMC card = 4 channels), and two UWB PMC insert onto a 6U VME/VXS customized Carrier Board?
There are several potential problems. Firstly, the logic for the UWB must be downloaded to the board via the memory-mapped SelectMap interface. In the standard logic, the SelectMap registers are readily addressible via the PCI bus, and our software toolset provides functions for loading logic images to the board.
If you have no PCI bus, the board will not be enumerated and all PCI registers will be unavailable. So, we'd need to create customized logic which permits configuration and loading another way. I need to have more information about the nature of your system. Will it have a processor? Can that processor access the J4 interface on the PMC card in some fashion? Unfortunately, the UWB does not boot the VP40/VP50 image from FLASH ROM; We may be unable to use the UWB in your application unless you either add PCI functionality or we redesign the communications interface to suit your requirements.
How can we recognize the 4 A/D channel synchronization sample mode as stated on the UWB user manual-J7 description?
Please download the latest version of the Velocia PMC Hardware Manual from http://www.innovative-dsp.com/support/manuals/Velocia_PMC_Manual.pdf. The latest version of this document clarifies the behaviour of the external sync pin. But, in summary, J7 acts like a simply level-sensitive gate. When active, acquisition commences. When inactive, acquisition is suspended. If you wire a common gate signal to multiple boards, synchronous operation is guaranteed: All boards receiving a common clock and sync will operate synchronously.
Is it Clock B channel input or is it Synchronization /Trig?
Clock B is an alternate clock input, identical to Clock A.
We plan to use two UWB PMC card to insert onto a 6U Carrier Board, if we do not plan to use an external Sync. Clock, but let one of the PMC card to produce an internal Clock. Can we apply the Sync Clock onto the other PMC?
This is not supported on the standard design. Custom logic could be produced which would treat Clock A or B as an output, instead of an input. However, at the speeds supported by the UWB (>200 MSPS), this is not recommended, since clock skew between boards can become a substantial problem. Use of an external clock and sync are generally required to achieve proper multi-board operation.
Can it recognize all 4 channels AD sync. Sampling?
Use of common clock and sync signals from sources capable of driving 50 owm loads will allow two or more boards to operate in tandem.
Can you help us to confirm AD converters Chip is LT2220-1 or AD9430 on the UWB Card? Please confirm if the LTC2201-1 Max Sample rate is 185 MSPS, but it is not 210MSPS, we can not find a clear description on your user manual.
We purchase a special speed grade of the LTC part. It is guaranteed to meet the performance we specify (210 MHz).
Can you supply us a detail description about UW B 210MSPS A/D PMC card’s external input Sample Clock data, form, relative technical request, range size, Frequency scope and etc.?
This is covered in detail within http://www.innovative-dsp.com/support/manuals/Velocia_PMC_Manual.pdf.