Innovative Integration

Innovative Integration is a data acquisition company that designs embedded electronics with digital & analog interfaces and FPGAs for digital signal processing, software radio and data acquisition applications used in industrial and rugged environments.

Digital Receiver K708

Dig Rec Overview > Ruggedized, Miniature PC-based Instrument with 128 Ch DDC, Spectrum Analyzer and Kintex 7 FPGA

  • Digital Receiver K708

Block Diagram
  • Digital Receiver K708

Ruggedization Level Table
  • Ruggedization Level Table

Digital Receiver K708 Peripherals

Quick Specs
Part Number: 90625-0-L0
Family: Software
Bus Type: CompactPCI
Bus Width:
Bus Speed:
Form Factor: Stand-Alone
DSP Quantity: 0
DSP Speed (total):
FPGA Size:
FPGA Quantity: 0
A/D Channels: 0
A/D Resolution:
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D/A Channels: 0
D/A Resolution:
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Digital IO:
  • Four 16-bit, 250 MHz ADCs; analog bandwidth 300 MHz (AC Coupled)
  • Xilinx Kintex-7 K410T2 FPGA
  • Intel Atom Quad Core, 8 GB RAM, 1 GbE
  • Sustained logging rate up-to 160 MByte/s
  • Embedded power meter
  • Optional GPS 10 MHz ref clock/PPS

  • Digital Down-Converter (DDC)
  • 128 DDC channels (8 banks x16 channels)
  • Programmable tuner: 1 – 250 MHz; resolution 0.0582 Hz
  • Programmable bandwidth: 10 – 800 KHz • Bandwidth 160 KHz DDC: SNR > 64 dB; SFDR > 76 dB
  • Support synchronous down-sampling on multiple channels using external clock/trigger
  • Synchronous VITA-49 timestamp

  • Real-Time Spectrum Analyzer
  • FFT Length: 32,768; 50% overlapped
  • Real-time Bandwidth: 100 MHz
  • Resolution Bandwidth: 3.8 KHz
  • 100% Probability of Intercept: 393 μsec
  • GSM
  • Digital Beamforming
  • Real-Time Spectrum Analysis

Digital Receiver K708 Overview

The K708 Digital Receiver supports one FMC-310 plug-in module providing up to 4 antenna inputs and 128 independent channels of DDC plus one spectrum analyzer embedded in a Xilinx Kintex-7 FPGA. It supports monitoring and/or recording of wide- or narrow- band spectra or channelized IF band data. The receiver supports contiguous recording at 160 MByte/s until running out of disk space.

Eight DDC banks, each supporting 16 channels, support monitoring of 128 DDC channels per single module. Each DDC bank can select its own ADC and decimation rate; each DDC channel has its own programmable tuner and programmable low-pass filtering supporting output bandwidth up-to 800 KHz. The data is packetized in VITA-49 format with accurate timestamps, synchronous to an external PPS signal. An embedded, digital power meter monitors the power (dBm) of any ADC input, supporting analog gain control of optional, user-supplied external front-end devices.

The spectrum analyzer, which supports windowing, calculates the wide-band spectrum of raw ADC data or the narrow-band spectrum of the cooked DDC output data at a programmable update rate. A programmable peak hold feature may be enabled to latch transient activity in the spectrum and the programmable threshold monitoring spectrum feature tracks spectral activities of up-to 512 bins.

A development kit is available for custom designs. Users can insert custom-made cores to create more advanced applications.

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