Innovative Integration

Innovative Integration is a data acquisition company that designs embedded electronics with digital & analog interfaces and FPGAs for digital signal processing, software radio and data acquisition applications used in industrial and rugged environments.

X3-25M

PCI Express XMC Module - (2) 105 MSPS A/Ds, (2) 50 MSPS D/As, Spartan 3A DSP 1.8M FPGA


  • X3-25M

Block Diagram

Ruggedization Level Table
  • Ruggedization Level Table

X3-25M Peripherals

Quick Specs
Part Number: 80176-0
Family: PMC/XMCe
Bus Type: PCI Express
Bus Width: VITA
Bus Speed: 42.3
Form Factor: XMC
Interfaces:
Functions: Data Acquisition · DSP - Digital Signal Processor · FPGA
DSP: 84 / 126 DSP48 Elements
DSP Quantity: 1
DSP Speed (total): 105 MHz
FPGA: Spartan-3A
FPGA Size: 1.8M
FPGA Quantity: 1
A/D Channels: 2
A/D Resolution: 16-bit
A/D Rate: b0105 MSPS
D/A Channels: 2
D/A Resolution: 16-bit
D/A Rate: b0050 MSPS
Digital IO: 64-bit
Peripherals: 80181-0 · 80186-0 · 90181-0 · 80167-0 · 80172-0 · 80173-0 · 80207-0 · 80116-1 · 67057 · 67058 · 67059 · 65057 · 67061 · 65036
Features
  • Two 105 MSPS, 16-bit A/D channels
  • Two 50 MSPS, 16-bit DAC channels
  • +/-2V, +/-1V, +/-0.2V input ranges
  • +/-2V output range
  • 16-bits front panel DIO (8 differential pairs)
  • Xilinx Spartan 3A,DSP 1.8M gate FPGA
  • 4MB SRAM
  • Programmable PLL timebase
  • Framed, software or external triggering
  • Log acquisition timing and events
  • 44 bits digital IO on J16
  • Power Management features
  • XMC Module (75x150 mm)
  • PCI Express (VITA 42.3)
Applications
  • Wireless Receiver and Transmitter
  • Stimulus-response measurements
  • Electronic Counter Measures (ECM)
  • High speed servo controls
  • Arbitrary Waveform Generation
  • Spectral Analysis
  • RADAR

X3-25M Overview

The X3-25M is an XMC IO module featuring two 16-bit, 105 MSPS A/D channels and two 16-bit, 50 MSPS DAC channels designed for high speed stimulus-response, ultrasound, and servo control applications.

Flexible trigger methods include counted frames, software triggering and external triggering. The sample rate clock is either an external clock or on-board programmable PLL clock source.

Data acquisition control, signal processing, buffering, and system interface functions are implemented in a Xilinx Spartan 3A DSP, 1.8M gate FPGA device. Two 1Mx16 memory devices are used for data buffering and FPGA computing memory.

The logic can be fully customized using VHDL and MATLAB using the FrameWork Logic toolset. The MATLAB BSP supports real-time hardware-in-the-loop development using the graphical, block diagram Simulink environment with Xilinx System Generator.

The PCI Express interface supports continuous data rates up to 180 MB/ s between the module and the host. A flexible data packet system implemented over the PCIe interface provides both high data rates to the host that is readily expandable for custom applications.

This extremely versatile module is easily adapted for use in virtually any type of system. Our XMC carrier adapters offer conduction and convection cooling and are available for a range of interfaces including Desktop PCI, Desktop PCI Express, Cabled PCI Express, CompactPCI, and PXI/PXI Express. This module is also readily installed into Innovative Integration's eInstrument Embedded PC, SBC-ComEx Single-Board Computer, and Andale Data Loggers.

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