Innovative Integration

Innovative Integration is a data acquisition company that designs embedded electronics with digital & analog interfaces and FPGAs for digital signal processing, software radio and data acquisition applications used in industrial and rugged environments.

XU-TX

XMC Module with Two, 5.1 GSPS, 16-bit DACs, 4.8GHz PLL, Xilinx Ultrascale FPGA 8 GB DDR4 Memory


  • XU-TX

Block Diagram
  • XU-TX

XMC Ruggedization Level Table
  • XMC Ruggedization Level Table

XU-TX Peripherals

Quick Specs
Part Number: 80335
Family: PMC/XMCe
Bus Type: PCI Express
Bus Width: 8-lane
Bus Speed:
Form Factor: XMC
Interfaces:
Functions: FPGA · Software Radio
DSP:
DSP Quantity: 0
DSP Speed (total):
FPGA: Kintex UltraScale
FPGA Size:
FPGA Quantity: 1
A/D Channels: 0
A/D Resolution:
A/D Rate:
D/A Channels: 2
D/A Resolution: 16-bit
D/A Rate: 5.1 GSPS
Digital IO:
Peripherals:
Features
  • Two 16-bit, > 5.1 GSPS DAC channels:
    • Single ended AC coupled outputs with programmable DC bias
    • Differential DC model option
    • >2 GHz analog bandwidth (1X)
    • Digital inverse sinc filter
    • Enhanced 2nd and 3rd Nyquist modes
      • “Frequency doubling” 2X mode
      • Interpolation filters: 1X(bypassed)-64x
      • 48 bit NCO and 31 32bit fast hop NCOs
    • Up to 7800 MB/s streaming via PCIe or Aurora
    • Internal or external clocking
      • Internal 0.3 to 4.8 GHz PLL each DAC
    • Internal or external triggering
      • Fixed latency, multi-board synchronization
  • Xilinx Kintex Ultrascale FPGA XCKU060/085:
    • 4 GB DDR4 DRAM in 2 banks each with 64 bit interface
      • Up to 38.4GB/s total bandwidth (based on 100% data buss efficiency)
    • 4 MB QDR SRAM in 1 bank with 32 bit interface
      • 12x faster than DDR for random access applications (like FFTs)
Applications
  • High Speed Arbitrary Waveform Generation
  • Wireless MIMO transmitter
  • RADAR Waveforms
  • Electronic surveilance and communications

XU-TX Overview

The XU-TX is an XMC module which features two AC-coupled single-ended 16-bit DAC outputs with programmable DC bias. The DAC devices employed support synchronization, interpolation, and their unique output circuits allow improved frequency synthesis in the 2nd and 3rd Nyquist zones. This can shift the Nyquist null frequency in the output spectrum to two times the typical Nyquist null frequency. The maximum sample rate of the DAC IC is 10.2 GSPS, the maximum external direct clocking rate is 5.1 GSPS and the on board PLL can generate clocks up to 4.8 GHz. The DACs' JESD 204B interfaces can stream data with transfer rates up to 5.1 Gsps.

A Xilinx Kintex Ultrascale XCVU060/085 FPGA with 4GB DDR4 RAM memory provides a very high performance DSP core for demanding applications such RADAR and wireless IF generation. The close integration of the analog I/O, memory and host interface with the FPGA enables real-time signal processing at rates exceeding 7000 GMAC/s.

The module supports two groups of 8-lane high-speed serial links connected to the host (one on XMC connector J15, and one on J16). These links can support several protocols (PCIe and Aurora, by default).

The XU family can be fully customized using VHDL and MATLAB and the FrameWork Logic toolset. The MATLAB BSP supports real-time hardware- in-the-loop development using the graphical, block diagram Simulink environment with Xilinx System Generator. IP logic cores are also available for SDR applications that provide multi-channel modulations for PSK and FSK systems. These IP cores transform the XU-TX module into versatile transmitter, ready for integration into your application.

Software tools for host development include C++ libraries and drivers for Windows and Linux. Application examples demonstrating the module features and use are provided, including streaming DAC samples from disk. The XU-TX can be used with the Andale high speed data record/playback system for arbitrary waveform generation from recorded data at sustained rates exceeding 7800 MB/s.A Xilinx Virtex Ultrascale XCVU060/085 FPGA with 4GB DDR4 RAM memory (probable increase to 8GB as footprint compatible higher density memories when they are validated with and supported by the FPGA) provides a very high performance DSP core for demanding applications such RADAR and wireless IF generation. The close integration of the analog IO, memory and host interface with the FPGA enables real-time signal processing at rates exceeding 7000 GMAC/s.

The XU XMC modules couple Innovative's powerful Velocia architecture with two high performance 8-lane PCI Express links connected to the carrier, and a new XMC carrier which connects the 8 lane XU-TX links to the 16-lane carrier PCIe link using a PCIe switch, contact the factory for availability). Alternate protocol 8-lane links to a host are also supported by the XU-TX's hardware using either P15's or P16's link to a compatible host.

The XU family can be fully customized using VHDL and MATLAB and the FrameWork Logic toolset. The MATLAB BSP supports real-time hardware- in-the-loop development using the graphical, block diagram Simulink environment with Xilinx System Generator.

IP logic cores are also available for SDR applications that provide multi-channel modulations for PSK and FSK systems. These IP cores transform the XU-TX module into versatile transmitter, ready for integration into your application.

Software tools for host development include C++ libraries and drivers for Windows and Linux. Application examples demonstrating the module features and use are provided, including streaming DAC samples from disk. The XU-TX can be used with the Andale high speed data record/playback system for arbitrary waveform generation from recorded data at sustained rates exceeding 6400 MB/s.

©1988-2016 Innovative Integration