Four LTC2255, 14-bit, 125 MSPS converters
· Virtex-II Pro FPGA, 4 Million gates
· PCI 64/66 with P4 port to host card
· 16MB SDRAM plus 2MB RAM for FPGA
· Low-jitter PLL clock source
· Advanced SW and firmware demo programs
· XMC - 10 Gbps full duplex · Software Defined Radio (SDR)
· Signal Identification
· Electronic Warfare
· Advanced RADAR
· Hardware Testing
· Telecom IP development The WB/NB Receiver PMC card features 16 receiver channels on one card using the most advanced architecture for ultra-fast signal capture and real-time processing. It integrates the latest analog chips with a 4M Virtex-II Pro FPGA for user-code, ample memory and flexible clocks/triggers on a 64/66 PCI mezzanine format.

High speed digital signal processing algorithms in the FPGA are developed using MATLAB and VHDL code. The FPGA Framework logic allows quick integration of custom signal processing into the data flow of the module through use of component-based modular design. DSP algorithms are rapidly designed using high-level MATLAB simulations that can be integrated into the FPGA hardware with minimal VHDL coding.

Novel features include on-board low jitter PLL clock, Sync Burst RAM dedicated to FPGA for fast, block-oriented processing and a direct PMC J4 DIO connection to the host card. This 64-bit J4 interface offers a very high-rate, low latency connection to Innovative Integration’s Velocia series of DSP and FPGA compact PCI boards and this port protocol can be reconfigured in logic to communicate with third party host cards.