The Xilinx System Generator for DSP The Xilinx System Generator for DSP is a plug-in to Simulink that enables designers to develop high-performance DSP systems for Xilinx FPGAs. It bridges the gap between the high-level abstract version of a design and its actual implementation in a Xilinx FPGA. Designers can design and simulate a system using MATLAB, Simulink, and Xilinx libraries of bit/cycle-true models. The tool will then automatically generate Hardware Description Language (HDL) code mapped to pre-optimized algorithms from Xilinx. This HDL design can then be synthesized for implementation in Virtex-II Pro Platform FPGAs and Spartan-IIE FPGAs. As a result, designers can define an abstract representation of a system-level design and easily transform this single source code into a gate-level representation. Additionally, it provides automatic generation of a HDL testbench, which enables design verification upon implementation. Application Areas Communications Data Acquisition or Import Electronics Image Processing Industrial Automation and Machinery Real-time Systems Signal Processing Many algorithms can be implemented onto Xilinx FPGAs using pre-verified soft DSP cores that can be implemented anywhere on the FPGA fabric. Xilinx has a comprehensive list of algorithms/cores that can be used for DSP, communications and video/imaging. Some categories include: Filters (FIR, DA FIR, CIC etc.) FFTs (16 -1024 point) Error Correction cores - (Reed Solomon, Viterbi, Turbo convolutional encoders/decoders etc) Math Functions (add, subtract, multiply, sine/cosine etc.) Basic DSP Building blocks - (SRL16, counters, LFSRs, etc) Advanced DSP blocks (DDC etc) State Machines (Mealy/Moore) Need expert advice? Click here to contact us now! Products > DSP + FPGA Products > Xilinx System Generator for DSP
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