Four 4 MSPS, 16-bit A/D channels
· Four 50 MSPS, 16-bit DAC channels
· +/-10V, +/-5V, +/-2.5V, +/-1.25V input ranges
· +/-10V output range
· Low Latency I/O
· Xilinx Spartan3, 1M gate FPGA
· 4MB SRAM
· Programmable PLL timebase
· Framed, software or external triggering
· Log acquisition timing and events
· 48 bits digital IO on J16
· Power Management features
· XMC Module (75x150 mm)
· PCI Express (VITA 42.3) · Servo Controls
· Stimulus-response measurements
· Arbitrary Waveform Generation The X3-A4D4 is an XMC IO module featuring four 16-bit, 4 MSPS A/D channels and four 16-bit, 50 MSPS DAC channels with FPGA computing core designed for servo controls, arbitrary waveform generation and stimulusresponse applications. Low latency SAR A/D and no-pipeline DACs support real-time servo control applications.

Flexible trigger methods include counted frames, software triggering and external triggering. The sample rate clock is either an external clock or on-board programmable PLL clock source.

Data acquisition control, signal processing, buffering, and system interface functions are implemented in a Xilinx Spartan3 FPGA, 1M gate device. Two 1Mx16 memories are used for data buffering and FPGA computing memory.

The logic can be fully customized using VHDL and MATLAB using the FrameWork Logic toolset. The MATLAB BSP supports real-time hardware-in-the-loop development using the graphical, block diagram Simulink environment with Xilinx System Generator.

The PCI Express interface supports continuous data rates up to 180 MB/ s between the module and the host. A flexible data packet system implemented over the PCIe interface provides both high data rates to the host that is readily expandable for custom applications.