64 single-end/32 differential digital IO
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100 MHz signal rates to FPGA using LVDS
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50 MHz LVCMOS signal rates
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400 MB/s LVDS capture/playback to SRAM
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Optional on-card termination
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Xilinx Spartan3, 1M gate FPGA
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4MB SRAM
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External clocking and triggering
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Programmable timebase
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Framed, software or external triggering
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Log acquisition timing and events
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48 bits digital IO on J16
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Power Management features
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XMC Module (75x150 mm)
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PCI Express (VITA 42.3)
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Pattern Generation
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Custom Digital Interfaces for Remote IO
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Digital Controls
The X3-DIO is an XMC IO module for high speed digital
IO data interfaces featuring 64bits of front-panel digital IO.
The DIO is either single-ended LVCMOS or LVDS differential
pairs. The DIO is directly connected to the FPGA, supporting
high speed pattern generation, digital recording, custom IO
interfaces and control applications.
Flexible trigger methods include counted frames, software
triggering and external triggering. The sample rate clock is
either an external clock or on-board programmable PLL clock
source.
Data acquisition control, signal processing, buffering, and
system interface functions are implemented in a Xilinx
Spartan3 FPGA, 1M gate device. Two 1Mx16 memories are
used for data buffering and FPGA computing memory.
The logic can be fully customized using VHDL and MATLAB
using the FrameWork Logic toolset. The MATLAB BSP
supports real-time hardware-in-the-loop development using
the graphical, block diagram Simulink environment with
Xilinx System Generator.
The PCI Express interface supports continuous data rates up
to 180 MB/ s between the module and the host. A flexible
data packet system implemented over the PCIe interface
provides both high data rates to the host that is readily
expandable for custom applications.
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