Twelve 250 KSPS, 16-bit A/D channels
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Twelve 1 MSPS, 16-bit DAC channels
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+/-10V, +/-5V, +/-2.5V, +/-1.25V input ranges
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+/-10V output range
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Low Latency I/O
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Xilinx Spartan3, 1M gate FPGA
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4MB SRAM
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Programmable PLL timebase
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Framed, software or external triggering
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Log acquisition timing and events
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48 bits digital IO on J16
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Power Management features
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XMC Module (75x150 mm)
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PCI Express (VITA 42.3)
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Servo Controls
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Stimulus-response measurements
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Data Acquisition
The X3-Servo module features 12 simultaneously
sampling A/D and DACs with an FPGA computing core. Low
latency SAR A/D and fast-settling DACs support real-time
servo control applications. The programmable input range
and high input interface directly to many sensors, while the
output is capable of driving many transducers. Front panel
digital IO can be also be used as PWM or process controls.
Clock and trigger controls include support for consistent
servo loop timing, counted frames, software triggering and
external triggering. The sample rate clock is either an
external clock or on-board programmable PLL clock source.
Data acquisition control, signal processing, buffering, and
system interface functions are implemented in a Xilinx
Spartan3 FPGA, 1M gate device. Two 1Mx16 memories are
used for data buffering and FPGA computing memory.
The logic can be customized using VHDL and MATLAB using
the FrameWork Logic toolset. The MATLAB BSP supports
real-time hardware-in-the-loop development using Simulink
block diagram environment with Xilinx System Generator.
The PCI Express interface supports continuous data rates up
to 180 MB/ s between the module and the host. A flexible
data packet system implemented over the PCIe interface
provides both high data rates to the host that is readily
expandable for custom applications.
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