FPGA

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  • The XA-500M is an XMC IO module featuring two 14-bit, 500 MSPS A/D channels and two 16-bit, 615 MSPS DAC channels designed for high speed stimulus-response, ultrasound, and servo control applications. Flexible trigger methods include counted frames, software triggering and external triggering. The sample rate clock is either an external clock or on- board programmable PLL clock source.
  • Cardsharp is a user-customizable, turnkey embedded instrument that includes two A9 CPU cores. Linux runs in core 0 to provide ethernet, USB and disk connectivity while core 1 runs real-time stand-alone applications. Cardsharp is compatible with Innovative's wide assortment of ultimate-performance FMC modules. With its modular IO, scalable performance and easy to use CPU core architecture, the Cardsharp reduces time-to-market while providing the performance you need.
  • The ePC-K7 is a user-customizable, turnkey embedded instrument that includes a full Windows/Linux PC and supports a wide assortment of ultimate-performance FMC modules. With its modular IO, scalable performance, and easy to use PC architecture, the ePC-K7 reduces time-to- market while providing the performance you need.
  • The mini-K7 is a user-customizable, turnkey embedded instrument that includes a full Windows/Linux PC and supports a wide assortment of ultimate-performance FMC modules. With its modular I/O, scalable performance, and easy to use PC architecture, the mini-K7 reduces time-to- market while providing the performance you need.
  • The PEX6-COP is a flexible FPGA co-processor card that integrates a Virtex6 FPGA computing core with an industry-standard FMC IO module on a half-length PCI Express desktop or server card.
  • The PEX7-COP is a flexible FPGA co-processor card that integrates a Kintex-7 FPGA computing core with an industry-standard FMC I/O module on a three-quarter-length PCI Express desktop or server card. The FPGA computing core features the Xilinx Kintex-7 FPGA family and is offered in two densities, K325 or K410. The K410 FPGA provides over 2000 DSP MAC elements operating at up to 500 MHz. The FPGA core has a 2048 MB DDR3 DRAM bank attached. For system communications, the PEX7-COP utilizes a PCI Express x8 Gen2 port capable of up to 3.2 GB/s sustained operation with 4 GB/s burst rate.
  • Scalable Open-VPX System for More Than 16-Qubit Synchronous Control and Readout Innovative Integration has been a leading supplier in the real-time embedded system market for more than 30 years, and is proud to be the control and readout system provider to many key players in the quantum computing field. Using high-speed, low-latency X6-1000M modules inside a compact VPX PC, a synchronous system to control and measure up to 32 entangled qubits is readily configured. With state-of-the-art FPGA technology, quantum computing engineers perform FFTs and generate waveforms to synchronously control qubits within 250 ns. A low-latency system is valuable for performing as many operations as possible before quantum decoherence occurs.
  • The X3-25M is an XMC IO module featuring two 16-bit, 105 MSPS A/D channels and two 16-bit, 50 MSPS DAC channels designed for high speed stimulus-response, ultrasound, and servo control applications.
  • The X3-A4D4 is an XMC IO module featuring four 16-bit, 4 MSPS A/D channels and four 16-bit, 50 MSPS DAC channels with FPGA computing core designed for servo controls, arbitrary waveform generation and stimulusresponse applications. Low latency SAR A/D and no-pipeline DACs support real-time servo control applications. Flexible trigger methods include counted frames, software triggering and external triggering. The sample rate clock is either an external clock or on-board programmable PLL clock source. Data acquisition control, signal processing, buffering, and system interface functions are implemented in a Xilinx Spartan3A DSP, 1.8M gate device. Two 1Mx16 memories are used for data buffering and FPGA computing memory.
  • The X3-DIO is a PCI Express XMC IO module for high speed digital IO data interfaces featuring 64bits of front-panel digital IO. The digital IO is either single-ended LVCMOS or LVDS differential pairs that is directly connected to the FPGA, for applications such as high speed pattern generation, digital recording, custom IO interfaces and controls.
  • The X3-SDF is an XMC IO module featuring 4 simultaneously sampling, sigma delta A/D channels designed for vibration, acoustic and high dynamic range measurements. The A/D device has programmable output rates up to 24 bits @ 2.5 MSPS and 16- bits @ 20 MSPS using the programmable filter in the A/D.
  • The X3-Servo module features 12 simultaneously sampling A/D and DACs with an FPGA computing core. Low latency SAR A/D and fast-settling DACs support real-time servo control applications. The programmable input range and high input interface directly to many sensors, while the output is capable of driving many transducers. Front panel digital IO can be also be used as PWM or process controls.