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The V614 Digital Receiver supports one or two plug-in X6-GSPS XMC modules, each featuring one ultra-wideband DDC and one spectrum analyzer embedded in the Xilinx Virtex-6 FPGA. It supports monitoring and/or recording of wide- or narrow-band spectra or channelized IF band data. The receiver supports contiguous recording at 1,300 MByte/s with four SSDs until running out of disk space.
The DDC has its own programmable tuner, programmable low-pass filtering, gain control, and decimation settings, supporting output bandwidth up-to 750 MHz. Data is packetized in VITA-49 format with accurate timestamps, synchronous to an external PPS signal. Each DDC channel can be enabled and disabled on the fly to conserve host computer storage and bandwidth. An embedded power meter monitors the power (dBm) of the ADC inputs, supporting analog gain control of optional, user-supplied external front-end devices.
The spectrum analyzer, including windowing, calculates the wide- band spectrum of the ADC data or the narrow-band spectrum of the DDC output data at the programmable update rate. The maximum hold helps to retain the information in the spectrum and the programmable threshold monitoring spectrum detects the spectral activities up-to 512 bins.
A development kit is available to facilitate custom designs. Users can insert custom-made cores within the provided Framework to create more advanced applications, including features such as demodulation, decoding and error correction.