Innovative Integration

Innovative Integration is a data acquisition company that designs embedded electronics with digital & analog interfaces and FPGAs for digital signal processing, software radio and data acquisition applications used in industrial and rugged environments.


FMC Module with four 24-bit, 625 kSPS A/D channels; two 18-bit D/A channels with on-board timing controls


Block Diagram

Ruggedization Level Table
  • Ruggedization Level Table

FMC-SDF Peripherals

Quick Specs
Part Number: 80348-0
Family: FMC
Bus Type: FMC
Bus Width:
Bus Speed:
Form Factor: FMC
Interfaces: SFP
Functions: Data Acquisition
DSP Quantity: 0
DSP Speed (total):
FPGA Size:
FPGA Quantity: 0
A/D Channels: 0
A/D Resolution:
A/D Rate:
D/A Channels: 0
D/A Resolution:
D/A Rate:
Digital IO:
  • Four A/D Input Channels
    • ± 5V Input Range
    • 625 kSPS, 24-bit A/D
    • Differential
  • Two D/A Output Channels
    • 2.1μs Settling Time, 18-bit D/A
    • ± 5V Output Range
  • Tachometer Input
    • Schmitt-Triggered for glitch tolerance
    • Can be configured to operate differentially
  • Sample clocks and timing and controls
    • 10 MHz, ±250 ppb stability on-board
    • reference.
    • Programmable PLL
    • Programmable Clock Frequency as low as
    • 3.05 kHz
    • Integrated with FMC triggers
  • FMC module, VITA 57.1
    • High Pin Count no SERDES required
    • Compatible with 2.5V VADJ
    • Power monitor and controls
  • 15 W typical
  • Conduction Cooling per VITA 20 subset
  • Environmental ratings for -40 to 85C
  • 9g RMS sine, 0.1g2/Hz random vibration
  • Seismic Data Acquisition
  • Audio and Acoustic Testing
  • ATE
  • Other High SNR Data Acquisition

FMC-SDF Overview

The FMC-SDF module features four simultaneously sampling ADCs and DACs with an FPGA computing core. High resolution sigma-delta ADCs and high resolution DACs support high dynamic range applications such as audio, ATE, and seismic data acquisition.

Clock and trigger controls include support for consistent servo loop timing, counted frames, software triggering and external triggering. The sample rate clock is either an external clock or on-board programmable PLL clock source

The FMC-SDF power consumption is 15 W for typical operation. The module may be conduction cooled using VITA20 standard and a heat spreading plate. Ruggedization levels for wide-temperature operation are available from -40 to +85C operation and 0.1 g2/Hz vibration. Conformal coating is also available.

Support logic in VHDL is provided for integration with FPGA carrier cards. Specific support for Innovative carrier cards includes integration with Framework Logic tools that support VHDL and Matlab developers. The Matlab BSP supports real-time hardware-in-the-loop development using the graphical block diagram Simulink environment with Xilinx System Generator for the FMC integrated with the FPGA carrier card.

Software tools for Innovative carrier cards include host development C++ libraries and drivers for Windows and Linux, 32/64-bit including RTOS variants. Application examples demonstrating the module features are provided.

*Sampling rates in an application depend on carrier and system design.

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