Innovative Integration

Innovative Integration is a data acquisition company that designs embedded electronics with digital & analog interfaces and FPGAs for digital signal processing, software radio and data acquisition applications used in industrial and rugged environments.


PCI Express XMC Module, LVDS or LVCMOS Digital IO and 1M FPGA with DSP

  • X3-DIO

Block Diagram

Ruggedization Level Table
  • Ruggedization Level Table

X3-DIO Peripherals

Quick Specs
Part Number: 80178-0 · 80178-1
Family: PMC/XMCe
Bus Type: PCI Express
Bus Width: VITA
Bus Speed: 42.3
Form Factor: XMC
Interfaces: Parallel (Digital)
Functions: Data Acquisition · FPGA
DSP: 84 / 126 DSP48 Elements
DSP Quantity: 1
DSP Speed (total): 105 MHz
FPGA: Spartan-3A
FPGA Size: 1.8M
FPGA Quantity: 1
A/D Channels: 0
A/D Resolution:
A/D Rate:
D/A Channels: 0
D/A Resolution:
D/A Rate:
Digital IO: 112-bit
Peripherals: 80181-0 · 80186-0 · 90181-0 · 80167-0 · 80172-0 · 80173-0 · 80207-0 · 80116-1 · 67057 · 67058 · 67059 · 65057 · 65036
  • Stream digital data to/from memory or disk
  • 400 MB/s LVDS capture/playback to SRAM
  • 100 MB/s capture to system memory/disk**
  • 50 MB/s streaming from system memory
  • 64 single-end/32 differential digital IO
  • Optional on-card termination
  • Xilinx Spartan3A DSP, 1.8M gate FPGA
  • 4MB SRAM
  • Programmable or external timebase
  • Framed, software or external triggering
  • Log acquisition timing and events
  • 44 bits digital IO on P16
  • Power Management features
  • XMC Module (75x150 mm)
  • PCI Express (VITA 42.3)
  • Digital Pattern Generation
  • Capture and record digital data
  • Custom Digital Interfaces for Remote IO
  • Digital Controls

X3-DIO Overview

The X3-DIO is a PCI Express XMC IO module for high speed digital IO data interfaces featuring 64bits of front-panel digital IO. The digital IO is either single-ended LVCMOS or LVDS differential pairs that is directly connected to the FPGA, for applications such as high speed pattern generation, digital recording, custom IO interfaces and controls.

Flexible trigger methods include counted frames, software triggering and external triggering. The sample rate clock is either an external clock or on-board programmable PLL clock source.

Data acquisition control, signal processing, buffering, and system interface functions are implemented in a Xilinx Spartan3A DSP FPGA, 1.8M gate device. Two 512Kx32 memories are used for data buffering and FPGA computing memory.

The logic can be fully customized using VHDL and MATLAB using the FrameWork Logic toolset. The MATLAB BSP supports real-time hardware-in-the-loop development using the graphical, block diagram Simulink environment with Xilinx System Generator.

The PCI Express interface supports continuous data rates up to 180 MB/s between the module and the host. A flexible data packet system implemented over the PCIe interface provides both high data rates to the host that is readily expandable for custom applications.

This extremely versatile module is easily adapted for use in virtually any type of system. Our XMC carrier adapters offer conduction and convection cooling and are available for a range of interfaces including Desktop PCI, Desktop PCI Express, Cabled PCI Express, CompactPCI, and PXI/PXI Express. This module is also readily installed into Innovative Integration's eInstrument Embedded PC, SBC-ComEx Single-Board Computer, and Andale Data Loggers.

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