Innovative Integration

Innovative Integration is a data acquisition company that designs embedded electronics with digital & analog interfaces and FPGAs for digital signal processing, software radio and data acquisition applications used in industrial and rugged environments.


PCI Express XMC Module - (12) 250 KSPS A/Ds, (12) 2MSPS DACs, 1.8M FPGA with DSP

  • X3-Servo

Block Diagram

Ruggedization Level Table
  • Ruggedization Level Table

X3-Servo Peripherals

Quick Specs
Part Number: 80179-0
Family: PMC/XMCe
Bus Type: PCI Express
Bus Width: VITA
Bus Speed: 42.3
Form Factor: XMC
Functions: Data Acquisition · FPGA
DSP: 84 / 126 DSP48 Elements
DSP Quantity: 1
DSP Speed (total): 105 MHz
FPGA: Spartan-3A
FPGA Size: 1.8M
FPGA Quantity: 1
A/D Channels: 12
A/D Resolution: 16-bit
A/D Rate: a0250 kSPS
D/A Channels: 12
D/A Resolution: 16-bit
D/A Rate: b0001 MSPS
Digital IO: 56-bit
Peripherals: 80181-0 · 80186-0 · 90181-0 · 80167-0 · 80172-0 · 80173-0 · 80207-0 · 80116-1 · 67057 · 67058 · 67059 · 65057 · 67080 · 65036 · 67084-G
  • Twelve 250 KSPS, 16-bit A/D channels
  • Twelve 2 MSPS, 16-bit DAC channels
  • +/-10V, +/-5V, +/-2V, +/-1V input ranges
  • +/-10V output range
  • Low Latency I/O
  • Xilinx Spartan3A DSP, 1.8M gate FPGA
  • 4MB SRAM
  • Programmable PLL timebase
  • Framed, software or external triggering
  • Log acquisition timing and events
  • 44 bits digital IO on J16
  • Power Management features
  • XMC Module (75x150 mm)
  • PCI Express (VITA 42.3)
  • Servo Controls
  • Stimulus-response measurements
  • Data Acquisition

X3-Servo Overview

The X3-Servo module features 12 simultaneously sampling A/D and DACs with an FPGA computing core. Low latency SAR A/D and fast-settling DACs support real-time servo control applications. The programmable input range and high input interface directly to many sensors, while the output is capable of driving many transducers. Front panel digital IO can be also be used as PWM or process controls.

Clock and trigger controls include support for consistent servo loop timing, counted frames, software triggering and external triggering. The sample rate clock is either an external clock or on-board programmable PLL clock source.

Data acquisition control, signal processing, buffering, and system interface functions are implemented in a Xilinx Spartan3A DSP, 1.8M gate device. Two 1Mx16 memories are used for data buffering and FPGA computing memory.

The logic can be customized using VHDL and MATLAB using the FrameWork Logic toolset. The MATLAB BSP supports real-time hardware-in-the-loop development using Simulink block diagram environment with Xilinx System Generator.

The PCI Express interface supports continuous data rates up to 180 MB/s between the module and the host. A flexible data packet system implemented over the PCIe interface provides both high data rates to the host that is readily expandable for custom applications.

This extremely versatile module is easily adapted for use in virtually any type of system. Our XMC carrier adapters offer conduction and convection cooling and are available for a range of interfaces including Desktop PCI, Desktop PCI Express, Cabled PCI Express, CompactPCI, and PXI/PXI Express. This module is also readily installed into Innovative Integration's eInstrument Embedded PC, SBC-ComEx Single-Board Computer, and Andale Data Loggers.

©1988-2017 Innovative Integration • Privacy Policy