Innovative Integration

Innovative Integration is a data acquisition company that designs embedded electronics with digital & analog interfaces and FPGAs for digital signal processing, software radio and data acquisition applications used in industrial and rugged environments.


XMC with Dual 2.5 GSPS A/D and DAC, Kintex Ultrascale FPGA, 4GB Memory and x8 PCIe

  • XU-RT

Block Diagram
  • XU-RT

Ruggedization Level Table
  • Ruggedization Level Table

XU-RT Peripherals

Quick Specs
Part Number: 80337
Family: Solomente
Bus Type: PCI Express
Bus Width: 8-lane
Bus Speed:
Form Factor: XMC
Functions: FPGA · Software Radio
DSP Quantity: 0
DSP Speed (total):
FPGA: Kintex UltraScale
FPGA Size:
FPGA Quantity: 1
A/D Channels: 2
A/D Resolution: 14-bit
A/D Rate: c0002.5 GSPS
D/A Channels: 2
D/A Resolution: 16-bit
D/A Rate: c0002.8 GSPS
Digital IO:
  • Two 2.5 GSPS, 14-bit A/D channels
  • Two 2.8 GSPS 16-bit DACs
  • ±1.0V, AC-Coupled, 50 ohm, SMA inputs and outputs
  • Xilinx Kintex Ultrascale XCKU0x0 FPGA
  • 2 Banks of 2 GB DRAM (4 GB total)
  • Ultra-low jitter programmable clock
  • Arbitrary Waveform Generation Memory Controller for DACs
  • Gen3 x8 PCI Express providing >7.0 GB/s sustained transfer rates
  • XMC Module (75x150 mm)
  • 40W typical
  • Conduction Cooling per VITA 20
  • Ruggedization Levels for -40 to 85C and 0.1
  • g²/Hz vibration/ 40g shock environments
  • Adapters for PXIe, VPX, desktop/rackmount PCI and cabled PCI Express systems
  • Wireless Receiver
  • WLAN, WCDMA, WiMAX front end
  • Medical Imaging
  • High Speed Data Recording and Playback
  • IP development

XU-RT Overview

The XU-RT integrates complex, 2.5 GSPS digitizing and signal generation with real-time signal processing on an XMC IO module for demanding DSP applications. The tight coupling of the analog I/O to the Kintex Ultrascale FPGA core realizes architectures for SDR, RADAR, and LIDAR front end sensor digitizing and processing. The PCI Express system interface sustains transfer rates over 7.0 GB/s for data recording and playback as part of a high performance real-time system.

The XU-RT features a dual-channel, 14-bit 2.5 GSPS A/D and a dual-channel, 2.8 GSPS 16-bit DAC, each with bandwidth over 5 GHz for wideband, undersampling applications. Internal mixers and decimator/interpolator capabilities (respectively) support concurrent, real-time frequency conversion. The sample clock may be sourced a low-jitter internal PLL or externally via a front-panel SMA and multiple cards can be synchronized for sampling or up/down-conversion.

A Xilinx Kintex Ultrascale XCKU 060/085 with 2 banks of 2GB DRAM provide a very high performance DSP core for demanding applications such RADAR and wireless IF generation. The close integration of the analog IO, memory and host interface with the FPGA enables real-time signal processing at extremely high rates.

The XU family can be fully customized using VHDL and MATLAB and the FrameWork Logic toolset. The MATLAB BSP supports real-time hardware-in-the- loop development using the graphical, block diagram Simulink environment with Xilinx System Generator.

IP logic cores are also available for SDR applications that provide multi-channel modulations for PSK and FSK systems. These IP cores transform the XU-RT module into versatile transmitter, ready for integration into your application.

Software tools for host development include C++ libraries and drivers for Windows and Linux. Application examples demonstrating the module features and use are provided, including streaming DAC samples from disk. The XU-RT can be used with the Andale high speed data record/playback system for arbitrary waveform generation from recorded data at sustained rates of 7600 MB/s.

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